The present invention relates generally to the electrical, electronic and computer arts and, more particularly, to the formation of optoelectronic structures.
III-V light sources such as multiple quantum well (MQW) lasers have been co-integrated with low-loss waveguides and silicon-based CMOS devices in the fabrication of photonic circuits. The III-V light source is optically coupled to the waveguide. Photonic integrated circuits allow signals to propagate signals at the speed of light.
The performance of devices fabricated using dissimilar semiconductor materials can be materially affected by defects that cause abrupt changes in electrical and/or optical properties. III-V semiconductors have larger lattice constants than silicon, so integrating them on silicon is challenging. III-V light sources have been bonded to waveguides using plasma-assisted wafer bonding wherein the components are exposed to an oxygen plasma before being pressed together. Misfit defects and threading dislocations are avoided by using such bonding techniques, but bonding may result in the misalignment of optical components and possible optical losses within the photonic circuits. A monolithic structure 20 including a III-V light source 22 bonded to a front-end-of-line assembly 24 is shown in FIG. 9. The monolithic structure includes a silicon wafer 26, a silicon dioxide layer 28 on the silicon wafer, and a silicon layer on the silicon dioxide layer. The silicon layer includes a first region comprising a waveguide core 30. A CMOS device 32 including source/drain regions 32′ is formed from a second region of the silicon layer. The CMOS device and waveguide core are encapsulated by a first dielectric layer 34A. Metal via conductors 36 within the dielectric layer 34A are electrically connected to the source/drain regions and the gate electrode of the CMOS device. The III-V light source 22 is encapsulated by a second metallized dielectric layer 34B that includes metal conductors 36 therein. Additional metallized dielectric layers 34C, 34D are formed over the second metallized dielectric layer 34B in further back-end-of-line (BEOL) processing.